Job Description

Company Description

Join a multibillion-dollar global company that brings together amazing technology, people, and operational scale to become a powerhouse in the memory industry. Headquartered in Rancho Cordova, California, Solidigm combines elements of an established, successful technology company with the spirit, agility, and entrepreneurial mindset of a start-up. In addition to the U.S. headquarters and other facilities in the U.S., the company has international presence in Asia, Europe, and the Americas. Solidigm will continue to lead the world in innovating new Memory technologies with aspirations to be the #1 NAND memory company in the world. At Solidigm, we view problems as opportunities to define innovative solutions that hold the power to change the world and unleash the potential technological needs that the future holds. At Solidigm, we are One Team that fosters a diverse, equitable, and inclusive culture that embraces individual uniqueness and empowers us to bring our best selves to deliver excellence in support of Solidigm's vision and mission to be the go-to partner for optimized data storage solutions. You can be part of the takeoff of an innovative business that develops cutting-edge products, delivers strong business value for customers, provides an engaging workplace for its employees, and serves a greater impact on the world. This is a golden opportunity for the right applicant to join us and help design, build, and lead Solidigm. We want a diverse team of dedicated professionals who will not just be Solidigm team members but contribute to how we shape the future of the organization. We are seeking applicants who will grow and thrive in our culture; be customer inspired, trusting, innovative, team-oriented, inclusive, results driven, collaborative, passionate, and flexible.

Job Description

As a TD CMOS Device and Modeling Engineer, you will be responsible for designing, developing, and characterizing CMOS transistors for 3D NAND flash memory technology at Solidigm.

Key responsibilities include:

• Device design: developing next generation CMOS transistors to achieve desired performance, power, and ariel density target for 3D NAND chip, including I/O, analog and high-voltage device types.
• Electrical characterization: designing test chip & scribe structures, performing electrical measurements to validate device design target and identify improvement directions.
• Model development: designing modeling tiles on test chip, performing electrical measurements on test chip silicon, generating and calibrating device models.
• Process development: together with fabrication team, designing new transistor DOE, developing and optimizing fabrication process. Identifying critical process parameters and yield limiters, ensuring consistent transistor performance in production.
• Data analysis: utilizing statistical data analysis software to analyze complex data sets including inline and electrical to identify trends, diagnose issues, and improve device margin by iterations.
• Cross-functional collaboration: working closely with Design, Reliability, and PE to solve CMOS related issues, ensuring NAND die and component meeting performance target and passing reliability qualification.
• Simulation and Modeling: utilizing TCAD tools to predict device behavior, optimize design parameters, and assess the impact of process variations on device performance.
• Technology scaling: staying updated with advanced CMOS technology evolution and disruptive innovations in device architecture, materials and fabrication technologies. Staying updated with industry and competitor CMOS roadmap and influence future CMOS technology roadmap for Solidigm.

The candidate will need to be a collaboration role model, establishing strong technical and personal credibility, ensuring on-time project success through influencing and working with other organizations

Qualifications

• BS, MS, or PhD in a science or engineering field and minimum 10 years of experience in research or development environment for the relevant technical areas are required
• Demonstrated technical leadership and a track record of problem solving with creativity and out-of-box thinking
• Strong understanding of semiconductor physics, particularly CMOS transistor operation and device scaling principles.
• Hands-on expertise in electrical characterization techniques like IV curves, capacitance-voltage measurements, and device modeling.
• Hands-on expertise in device modeling tools such as Verilog-A or similar simulation platforms
• Excellent statistical data analysis and problem-solving skills
• Proficiency in TCAD simulation tools for device design and analysis
• Experience with semiconductor fabrication processes
• Strong communication and collaboration skills to work effectively with cross-functional teams

Additional information

For California, Colorado, New York, Washington, and remote roles: The compensation range for this role is $136,750 - $252,010. Actual compensation is influenced by a variety of factors including but not limited to skills, experience, qualifications, and geographic location.

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